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    FPGA System Architect

    Technology
    National Radio Astronomy Observatory
    Virginia, Charlottesville, 22901
    Permanent
    Competitive
    Hybrid

    Job Description

    The FPGA System Architect at the National Radio Astronomy Observatory will lead architecture and implementation of advanced FPGA-based signal processing and control systems for world-class radio telescopes. Working within the Engineering & Design department in a collaborative, research-focused environment, you will define system architectures, develop FPGA designs, and integrate high-speed DSP pipelines that enable cutting-edge astronomy and astrophysics. This role partners closely with scientists and engineers worldwide, offers access to state-of-the-art technology, and supports continuous learning and professional growth.

    Responsibilities

    • Architect FPGA-based signal processing and control systems for advanced radio telescopes.

    • Lead end-to-end FPGA design, simulation, verification, and integration with digital/analog subsystems.

    • Collaborate with astronomers, engineers, and software teams to translate scientific requirements into system architectures.

    • Optimize throughput, latency, and reliability of high-speed DSP and data acquisition pipelines.

    • Define interface specifications, timing constraints, and design standards for FPGA platforms.

    • Perform design reviews, code reviews, and verification planning for FPGA and digital logic designs.

    • Develop and maintain documentation, including architecture diagrams and design specifications.

    • Guide technology selection for FPGAs, high-speed I/O, and supporting hardware.

    • Mentor engineers and contribute to continuous improvement of engineering processes.

    • Support observatory operations with troubleshooting and upgrades of deployed FPGA systems.

    Required Skills

    • FPGA design (VHDL/Verilog/System

    • Verilog)

    • Digital signal processing (DSP) for RF/communication systems

    • High-speed interfaces (PCIe, 10/40

    • Gb

    • E, JESD, DDR)

    • So

    • C/MPSo

    • C platforms (Xilinx/Intel)

    • Hardware description languages and simulation tools

    • Timing closure and FPGA implementation flows

    • Embedded C/C++ for firmware and control

    • System-level architecture and requirements analysis

    • Version control and CI for hardware (Git, pipelines)

    • Technical documentation and design reviews

    Posted on October 4, 2026

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